A flash memory device, such as those used in electronic devices (e.g., a desktop computer, a handheld computer, a mobile telephone, a digital camera or any other kind of computer/microcontroller based terminal that can use non-volatile memory as a storage medium) may have multiple partitions. During write operations, data cannot be read from the memory until the write operation is completed. This causes read latency that might not be desirable or acceptable for time critical use cases, like demand paging, for example. In any application, overall system performance will be faster if data can be read from read-only partitions while write operations are in process.
One example of an application where read latency is critical is the paging-on-demand-technique, where pages of data are not copied from data storage to RAM until they are needed. Memory is organized in so-called blocks and pages, with one page typically consisting of 1 kB or 4 kB in the demand paging context. A block combines several pages and usually has a size of 16 kB. To reduce the required memory size, only pages that are currently needed for an application are loaded. Therefore, demand paging requires simultaneous read and write processes. In NAND flash memory systems, paging-on-demand may be applied, but a major drawback of systems for this technique is that read and write operations cannot be performed simultaneously.
One proposal by the JEDEC Solid State Technology Association to handle the situation when there is an ongoing write operation and another write operation is requested with an embedded memory (eMMC) is to wait until the write operation has been concluded before permitting a read operation to be requested. Another proposal is to allow interrupting an ongoing write operation and thereby shorten the latency for the high priority read. There are a variety of problems with these approaches. For example, consider a write operation that has been requested to write the (10) blocks into the eMMC. After writing down four (4) blocks, the operation or process is interrupted by a high priority read operation or process. When the high priority read operation has been concluded, the file system resumes the write operation in order to write down the remaining six (6) blocks, but then a new high priority read request may arrive, and the write operation is interrupted again. One of the sources of high priority read is demand paging, which is a code execution method. During startup of the electronic device or when launching a new application, there can be a whole series of page faults that will request high priority read operations. In the foregoing scenario, there may be several seconds delay before the write command can be concluded.
Any of the described features and problems are present in both memory cards and embedded mass storage devices based on flash memory. Therefore, a need exists to provide a method of controlling read processes on NAND flash memory cards and embedded mass storage devices in order to decrease read latency times.